Designing 1-to-4 Demultiplexer using Lua
What is a Demultiplexer
In digital electronic a demultiplexer (or DEMUX) is the logic device taking a single input signal and selecting one of many data-output-lines, which is connected to the single input. A multiplexer is often used with a complementary demultiplexer on the receiving end.
Demultiplexer 1-to-4 has 1 input line, which are forwarded to one of 4 output lines, and 2 select (address) lines, which are used to select to which output line input line will be forwarded.
Gorgeous Karnaugh Versions with Lua Support
Note: Not all versions of Gorgeous Karnaugh software supports Lua scripting. Check you version features here.
Writing the Lua Script to Build Truth Table
In natural language, we can describe the demultiplexer 1-to-4 as device, which forwards input line to one of outputs, which addess is taken on the select (address) lines. We can make the truth table by hands, but it is a good idea to translate description to next Lua script:
gkAddInputVar('a', 2) gkAddInputVar('x') gkAddFunction('y', 4) MaxInput = gkGetMaxInputVector() for InputVec = 0, MaxInput do addrBits = gkGetBits( InputVec, 1, 2 ) x = gkGetInputValue( InputVec, 'x' ) gkSetOutput(InputVec, 0) gkSetFunctionValue( InputVec, addrBits, x) end
Launch Gorgeous Karnaugh and select “File” — “New” — “Empty set for scripting” menu item. After script entered, press “Alt-Enter” (or select “Edit” — “Execute Lua script” menu item).
K-Maps for Minimization
Lua script, given above, produces next K-Maps for minimization:
Minimizing the K-Maps
Let minimize the K-Maps for Product-of-Sums (by 0):
y1 = (!a1) (!a2) (x); y2 = (!a1) (a2) (x); y3 = (!a2) (a1) (x); y4 = (a2) (a1) (x);
Let minimize the K-Maps for Sum-of-Products (by 1):




and get the functions minimal form:
y1 = !a1 !a2 x; y2 = !a1 a2 x; y3 = a1 !a2 x; y4 = a1 a2 x;
Building the Logic Gate Diagrams
In the “Coverage sets” pane select the needed coverage set. Next, select the “Coverages” — “Open Schematic”. In the appeared dialog window select appropriate diagram generation options, and press “Ok” button. After this, you got the logic gate diagram.
Logic gate diagrams for PoS and SoP:
Checking Logic Gate Diagram in a Simulator
You can use “CEDAR Logic Simulator” program to check how your logic gate diagram works. For this, choose menu item “File” — “Save for CedarLogic” in the Gorgeous Schematic, save the “.CDL” file and open it in the “CEDAR Logic Simulator”.
Note: Not all versions of Gorgeous Karnaugh software supports export logic gate diagrams to CedarLogic. Check you version features here.
Gorgeous Karnaugh Versions
You can learn about Gorgeous Karnaugh features and compare diferences between Gorgeous Karnaugh versions on the Gorgeous Karnaugh features page.