1lytics

Designing 1-bit Full Adder using Lua

What is an Adder

In digital electronics, an adder (or summer) is a digital circuit that performs addition of numbers. In many computers and other kinds of processors, adders are used not only in the arithmetic logic unit(s), but also in other parts of the processor, where they are used to calculate addresses, table indices, and similar.

The half adder adds two one-bit binary numbers A and B. It has two outputs, S and C (the value theoretically carried on to the next addition); the final sum is 2*C + S.

A full adder adds binary numbers and accounts for values carried in as well as out. A one-bit full adder adds three one-bit numbers, often written as A, B, and Cin; A and B are the operands, and Cin is a bit carried in from the next less significant stage. The circuit produces a two-bit output sum typically represented by the signals Cout and S, where sum = 2*Cout + S.

Gorgeous Karnaugh Versions with Lua Support

Note: Not all versions of Gorgeous Karnaugh software supports Lua scripting. Check you version features here.

Writing the Lua Script to Build Truth Table

Let write the Lua script to define outputs for 1-bit full adder:

gkAddInputVarList('A','B','Ci')
gkAddFunctionList('Co','Y')
MaxInput = gkGetMaxInputVector()
for InputVec = 0, MaxInput do
    A  = gkGetInputValue( InputVec, 'A' )
    B  = gkGetInputValue( InputVec, 'B' )
    Ci = gkGetInputValue( InputVec, 'Ci' )
    gkSetOutput(InputVec, A+B+Ci)
end


We can write alternate script, that produces the same result with help of gkGetOnesCount function:

gkAddInputVarList('A','B','Ci')
gkAddFunctionList('Co','Y')
MaxInput = gkGetMaxInputVector()
for InputVec = 0, MaxInput do
    gkSetOutput(InputVec, gkGetOnesCount(InputVec))
end

Launch Gorgeous Karnaugh and select “File” — “New” — “Empty set for scripting” menu item. After script entered, press “Alt-Enter” (or select “Edit” — “Execute Lua script” menu item).

Truth Table

Lua script, given above, generates next truth table:

#TABLE: A,B,Ci => Co,Y
000 => 00
001 => 01
010 => 01
011 => 10
100 => 01
101 => 10
110 => 10
111 => 11

K-Maps for Minimization

One-bit full adder Lua script produces next K-Maps for minimization:

Y 1-bit full adder output Co 1-bit full adder output

Minimizing the K-Maps

Let minimize the K-Maps for Product-of-Sums (by 0):

PoS Minimized Y 1-bit full adder output PoS Minimized Co 1-bit full adder output

and get the functions minimal form:

Co = (B|Ci) (A|Ci) (A|B);
Y = (!A|!B|Ci) (!A|B|!Ci) (A|!B|!Ci) (A|B|Ci);

Let minimize the K-Maps for Sum-of-Products (by 1):

SoP Minimized Y 1-bit full adder output SoP Minimized Co 1-bit full adder output

and get the functions minimal form:

Co = B Ci | A Ci | A B;
Y = A !B !Ci | !A B !Ci | !A !B Ci | A B Ci;

Building the Logic Gate Diagrams

In the “Coverage sets” pane select the needed coverage set. Next, select the “Coverages” — “Open Schematic”. In the appeared dialog window select appropriate diagram generation options, and press “Ok” button. After this, you got the logic gate diagram.

Logic gate diagrams for PoS and SoP:

Logic gate diagram for PoS minimized 1-bit full adder Logic gate diagram for SoP minimized 1-bit full adder

Checking Logic Gate Diagram in a Simulator

You can use “CEDAR Logic Simulator” program to check how your logic gate diagram works. For this, choose menu item “File” — “Save for CedarLogic” in the Gorgeous Schematic, save the “.CDL” file and open it in the “CEDAR Logic Simulator”.

Note: Not all versions of Gorgeous Karnaugh software supports export logic gate diagrams to CedarLogic. Check you version features here.

Gorgeous Karnaugh Versions

You can learn about Gorgeous Karnaugh features and compare diferences between Gorgeous Karnaugh versions on the Gorgeous Karnaugh features page.



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